1. Field of the Invention
This invention relates to data storage devices and more particularly relates to non-volatile storage element programming.
2. Description of the Related Art
Some solid-state storage elements, such as NAND flash, are organized into erase blocks and pages. The pages may be programmed and read using wordlines and bitlines associated with the erase blocks. Some pages of an erase block may be more susceptible to bit errors than others. In some cases, the pages associated with a particular wordline of an erase block may be more susceptible to bit errors due to their position in the erase block than pages associated with other word lines of an erase block. In other cases, the pages associated with a particular wordline of an erase block may be more susceptible to bit errors due to the order in which pages for a certain wordline are programmed in relation to other word lines of an erase block. In particular, the bit errors may result from one wordline having a lower retention time than others within the same erase block.
Such bit errors may be detected and corrected with a suitable error correcting code. To ensure data integrity, an error correcting code must be selected that is robust enough to protect the susceptible pages from bit errors. However, using such an error correcting code may be wasteful, especially for pages that are less susceptible to bit errors, since the error correcting code consumes space in the erase block that could be used to store data.